Merge pull request #36 from bdunahu/bdunahu

Add fetch stage implementation, tests, program loading, DTO object
Base classes plus base tests for Instruction Fetch stage with a default program

9 files changed, 58 insertions, 32 deletions

diff --git a/src/sim/controller.cc b/src/sim/controller.cc
index 93fd0e0..6d46dc4 100644
--- a/src/sim/controller.cc
+++ b/src/sim/controller.cc
@@ -1,34 +1,23 @@
 #include "controller.h"
-#include "ex.h"
-#include "id.h"
-#include "if.h"
-#include "mm.h"
 #include "response.h"
 #include "storage.h"
-#include "wb.h"
 
-Controller::Controller(Storage *storage, bool is_pipelined)
-	: Stage(nullptr)
+Controller::Controller(Stage *stage, Storage *storage, bool is_pipelined)
+	: Stage(stage)
 {
-	this->clock_cycle = 0;
+	this->clock_cycle = 1;
 	this->storage = storage;
 	this->is_pipelined = is_pipelined;
 	this->pc = 0x0;
 	this->gprs = {0};
-
-	IF *f = new IF(nullptr);
-	ID *d = new ID(f);
-	EX *e = new EX(d);
-	MM *m = new MM(e);
-	WB *w = new WB(m);
-	this->next = w;
 }
 
 void Controller::run_for(int number)
 {
+	InstrDTO instr;
 	int i;
 	for (i = 0; i < number; ++i) {
-		this->advance();
+		this->advance(instr);
 	}
 }
 
@@ -38,9 +27,11 @@ std::array<int, GPR_NUM> Controller::get_gprs() { return this->gprs; }
 
 int Controller::get_pc() { return this->pc; }
 
-Response Controller::advance()
+Response Controller::advance(InstrDTO &i)
 {
-	this->next->advance();
+	Response r;
+ 
+	r = this->next->advance(i);
 	++this->clock_cycle;
-	return OK;
+	return r;
 }
diff --git a/src/sim/ex.cc b/src/sim/ex.cc
index f286713..1de61d0 100644
--- a/src/sim/ex.cc
+++ b/src/sim/ex.cc
@@ -1,10 +1,11 @@
 #include "ex.h"
+#include "instrDTO.h"
 #include "logger.h"
 #include "response.h"
 
 static Logger *global_log = Logger::getInstance();
 
-Response EX::advance()
+Response EX::advance(InstrDTO &i)
 {
 	global_log->log(INFO, "hello from execute!");
 	return OK;
diff --git a/src/sim/id.cc b/src/sim/id.cc
index 56d9549..df55fe2 100644
--- a/src/sim/id.cc
+++ b/src/sim/id.cc
@@ -1,10 +1,11 @@
 #include "id.h"
+#include "instrDTO.h"
 #include "logger.h"
 #include "response.h"
 
 static Logger *global_log = Logger::getInstance();
 
-Response ID::advance()
+Response ID::advance(InstrDTO &i)
 {
 	global_log->log(INFO, "hello from decode!");
 	return OK;
diff --git a/src/sim/if.cc b/src/sim/if.cc
index 1026072..deed8e1 100644
--- a/src/sim/if.cc
+++ b/src/sim/if.cc
@@ -1,15 +1,19 @@
 #include "if.h"
-#include "logger.h"
+#include "accessor.h"
+#include "instrDTO.h"
 #include "response.h"
 
-static Logger *global_log = Logger::getInstance();
-
-Response IF::advance()
+Response IF::advance(InstrDTO &i)
 {
-	global_log->log(INFO, "hello from fetch!");
-	return OK;
-}
-
-
+	Response r;
+	signed int bits;
 
+	r = this->storage->read_word(this->id, this->pc, bits);
+	if (r == OK) {
+		++this->pc;
+		i.set_if_cycle(this->clock_cycle);
+		i.set_instr_bits(bits);
+	}
 
+	return r;
+}
diff --git a/src/sim/instrDTO.cc b/src/sim/instrDTO.cc
new file mode 100644
index 0000000..6427b1a
--- /dev/null
+++ b/src/sim/instrDTO.cc
@@ -0,0 +1,15 @@
+#include "instrDTO.h"
+
+InstrDTO::InstrDTO()
+{
+	this->if_cycle = 0;
+	this->instr_bits = 0;
+}
+
+int InstrDTO::get_if_cycle() { return this->if_cycle; }
+
+signed int InstrDTO::get_instr_bits() { return this->instr_bits; }
+
+void InstrDTO::set_if_cycle(int cycle) { this->if_cycle = cycle; }
+
+void InstrDTO::set_instr_bits(signed int instr) { this->instr_bits = instr; }
diff --git a/src/sim/mm.cc b/src/sim/mm.cc
index be774ad..28243e7 100644
--- a/src/sim/mm.cc
+++ b/src/sim/mm.cc
@@ -1,10 +1,11 @@
 #include "mm.h"
 #include "logger.h"
 #include "response.h"
+#include "instrDTO.h"
 
 static Logger *global_log = Logger::getInstance();
 
-Response MM::advance()
+Response MM::advance(InstrDTO &i)
 {
 	global_log->log(INFO, "hello from memory!");
 	return OK;
diff --git a/src/sim/stage.cc b/src/sim/stage.cc
index 399743a..0d48774 100644
--- a/src/sim/stage.cc
+++ b/src/sim/stage.cc
@@ -7,3 +7,5 @@ Stage::Stage(Stage *next) {
 std::array<int, GPR_NUM> Stage::gprs;
 int Stage::pc;
 Storage *Stage::storage;
+bool Stage::is_pipelined;
+int Stage::clock_cycle;
diff --git a/src/sim/wb.cc b/src/sim/wb.cc
index 83b1c3c..9585fd3 100644
--- a/src/sim/wb.cc
+++ b/src/sim/wb.cc
@@ -1,10 +1,11 @@
 #include "wb.h"
+#include "instrDTO.h"
 #include "logger.h"
 #include "response.h"
 
 static Logger *global_log = Logger::getInstance();
 
-Response WB::advance()
+Response WB::advance(InstrDTO &i)
 {
 	global_log->log(INFO, "hello from write back!");
 	return OK;
diff --git a/src/storage/dram.cc b/src/storage/dram.cc
index 371503d..f90f8db 100644
--- a/src/storage/dram.cc
+++ b/src/storage/dram.cc
@@ -56,6 +56,16 @@ Response Dram::read_word(Accessor accessor, int address, signed int &data)
 	});
 }
 
+// TODO load a file instead and test this method
+void Dram::load(std::vector<signed int> program) {
+	unsigned long i;
+	for (i = 0; i < program.size(); ++i) {
+		int line, word;
+		get_memory_index(i, line, word);
+		this->data->at(line).at(word) = program[i];
+	}
+}
+
 Response Dram::process(
 	Accessor accessor,
 	int address,