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support for read word, write line in all levels of storage, cache load, dirty cache eviction, memory address wrapping
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write only has to wait until eviction and does not care about line replacement in cache from memory
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cache load
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multilevel cache implementation)
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Memory simulator CLI function implementation
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cache store, handle load requests to memory, write allocate policy
-- changes look good
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Add get_bit_fields, which parses cache fields from a memory address
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Implement dram load
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Storage.view + Dram.store methods, tests
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Configure main loop to accept commands for memory subsystem
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