Age | Commit message (Collapse) | Author |
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Add controller.h, implementation and tests.
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Remove manual clock advancing / resolution from storage devices
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Small cleanups to up a lot of implementation details
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Rewrite current cache.cc tests, add test-helper function to dram
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Make memory simulator an optional command, switch to test fixtures
Changes look good
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clarify macro names, implement load in CLI, fix many display issues
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support for read word, write line in all levels of storage, cache load, dirty cache eviction, memory address wrapping
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write only has to wait until eviction and does not care about line replacement in cache from memory
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cache load
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multilevel cache implementation)
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Memory simulator CLI function implementation
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cache store, handle load requests to memory, write allocate policy
-- changes look good
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